KD7020 - Digital Design Automation

The module will be delivered via a combination of lectures, directed and independent learning and practical workshops as well as asynchronous pre-recorded videos.
Lectures will be used to deliver the key concepts, knowledge and understanding of high-level technologies. Regular workshops will provide them with the vital practical experience required to support hardware design concepts and develop the skills the students will need to successfully complete the assignment.

All taught materials will be provided on the eLearning platform, including workshop exercises, past exam questions and examples. You will also have access to pre-recorded video of all topics and workshops. You will be encouraged to ask questions and fully engage during all contact sessions, including workshops.

All modules at Northumbria include a range of reading materials that students are expected to engage with. The reading list for this module can be found at: http://readinglists.northumbria.ac.uk
(Reading List service online guide for academic staff this containing contact details for the Reading List team – http://library.northumbria.ac.uk/readinglists)

Knowledge & Understanding:
1. Applying appropriate codes of practice and industry standards; knowledge of the use of high-level techniques, programmable logic development equipment, software packages, and simulation tools. (AHEP 4 M1, M3)

Intellectual / Professional skills & abilities:
2. Design, model, simulate, and implement a range of digital hardware sub-systems using high-level techniques. (AHEP 4 M5, M6)

Personal Values Attributes (Global / Cultural awareness, Ethics, Curiosity) (PVA):
3. Doing group work to develop teamwork skills and promote collaboration; using practical workshops skills to investigate complex problems; providing the opportunity to innovate and show creativity by granting design freedom and research requirement within a solution approach (AHEP 4 M5, M16);
4. Awareness of environmental effect from high-power processing units and digital systems assessed in CW3 (AHEP 4 M7)

This module will be assessed as follows.
1- Coursework (CW): Project assignment 60% for LO1, LO2, LO3:
Here the students are asked to develop an high level code to program a FPGA device to deliver a list of specifications as the project requirements.
2- Coursework (CW): Lab report 40% for LO1, LO2, LO3, LO4:
The students are asked to write a report based on the lab sessions they had to show their level of understanding and skills related to practical aspect of the module.

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In this module you will acquire knowledge of designing digital systems using hardware description language (HDL). The module introduces digital logic design using Verilog hardware description language for FPGA chips. You will learn essential register-transfer level (RTL) coding skills to build synthesizable logic circuit. Both combinational and sequential circuits will be covered and commonly used digital blocks such as multiplexer, demultiplexer, counter, shift register, memory block, etc will be created using RTL coding. The industry standard tools will be used to facilitate design, verification, and implementation of the synthesizable codes. You will also learn the benefit of using testbench, IP, and timing analysis to enhance the development procedure and efficiency. Additionally, you will be introduced to program FPGA using modern programming languages. The concept of System on Chip (SoC) is covered, and you will learn the fundamentals of a modern programming language to program the FPGA device. The module also looks at finite state machine (FSM) and its RTL implementation as well as the concept of hierarchical design and clean code. Both RTL and modern programming language lectures will be accompanied by designated workshop to give you the hands-on experience and knowledge of practical work.